In recent years, the spread of information processing devices and their greater sophistication has brought about the appearance of different types of applications. These applications are mainly implemented with software by a CPU (central processing unit). However a portion of these applications require a higher level of processing capability than that of currently used general-purpose type processors. The processors also require a greater processing capacity. Currently, the rapid progress that has been made in semiconductor manufacturing technology has expanded the circuit scale on which LSI (large scale integration) circuits can be fabricated, creating a need for LSI devices that are capable of efficiently using circuits on a large scale.
An LSI device with a higher processing capacity, which is capable of efficiently using circuits on a large scale, while maintaining a general-purpose function, is disclosed in the below-listed Patent document 1. The operation of this LSI device is changed by altering the configuration information specifying how the hardware, typified by a FPGA (Field Programmable Gate Array), is structured. The prior technology consists of cell arrays, containing a wiring region, and logic cells. Each cell within the wiring layer region is connected by wiring connecting to adjacent cells and by long-range wiring connecting to cells in separate locations. This structure (configuration) makes it possible to select whether or not to connect a wire by way of a switch within the wiring region. An LSI device with this type of structure can perform different processing by changing the configuration information that determines the cell operation and the on-off switching wiring operation. Changing the configuration information according to the processing to be run makes it possible to provide a structure resembling dedicated hardware, and so it is capable of faster processing than general-purpose processors.
A technology called reconfigurable LSI, as disclosed in the below-listed Patent document 2, has also been the focus of much attention in recent years. In the above-mentioned FPGA technology, logic gates comprised, for example, of NAND and NOR circuits are formed in arrays and their connecting wires are switched (to operate the circuits). In reconfigurable LSI technology, however, the arithmetic units are formed in arrays instead of logic gates, and the arithmetic unit functions and the wiring among each arithmetic unit are switched by the configuration information.
[Patent document 1] International disclosure 10754/1994 pamphlet
[Patent document 2] US Patent laid-open No. 35772/2001
However, in the technology mentioned above, the cells within the wiring region are connected by long-range wiring connecting to cells at separated locations and by wiring connecting to adjacent cells. Also, the flip-flops that coordinate the timing at which data is input among the cells, in many cases, are formed at locations different from the regions comprised of logic gates. Therefore, the wiring length connecting between cells, or for connecting the flip-flops for adjusting the timing for transferring data, changes according to the configuration information. This fact signifies that the wiring length for transferring data in one clock cycle changes according to the configuration information. In other words, the maximum operating frequency of the LSI device is related to the wiring length along which data must be sent in one clock cycle so that the maximum operating frequency of the LSI will vary according to the configuration information. Therefore, the LSI operating frequency must be changed every time the configuration information is changed. Changing the operating frequency is not practical during actual operation, so that the circuits, in most cases, are operated at a lower operating frequency. The present inventors took notice of the fact that such techniques had a problem in that improving the maximum operating frequency of the chip is difficult because the length of the wiring between cells, or the length of the wiring to the flip-flops, changes.